* INA117
*$
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* (C) Copyright 2011 Texas Instruments Incorporated. All rights reserved.                                            
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** This model is designed as an aid for customers of Texas Instruments.
** TI and its licensors and suppliers make no warranties, either expressed
** or implied, with respect to this model, including the warranties of 
** merchantability or fitness for a particular purpose.  The model is
** provided solely on an "as is" basis.  The entire risk as to its quality
** and performance is with the customer.
*****************************************************************************
*
* This model is subject to change without notice. Texas Instruments
* Incorporated is not responsible for updating this model.
*
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*
** Released by: Analog eLab Design Center, Texas Instruments Inc.
* Part: INA117
* Date: 21JUL2011
* Model Type: ALL IN ONE
* Simulator: PSPICE
* Simulator Version: 16.0.0.p001
* EVM Order Number: N/A
* EVM Users Guide: N/A
* Datasheet: SBOS154A
*
* Model Version: 1.0
*
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* 
* Updates:
*
* Version 1.0 : 
* Release to Web
*
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* COMMENTS:
* INA117 = A3_117 OPERATIONAL AMPLIFIER + PRECISION RESISTOR NETWORK
*
* CONNECTIONS:           NON-INVERTING INPUT
*                        |  INVERTING INPUT
*                        |  |  POSITIVE POWER SUPPLY
*                        |  |  |  NEGATIVE POWER SUPPLY
*                        |  |  |  |  OUTPUT
*                        |  |  |  |  |  REFERENCE A
*                        |  |  |  |  |  |  REFERENCE B
*                        |  |  |  |  |  |  |
* PIN CONFIG FOR INA117  1  2  3  4  5  8  9
******************************************************************************
.SUBCKT INA117         1  2  3  4  5  8  9
X1                     14 13  3  4  5  A3_117
*
R1    2   13   383.8000K
R2   13    5   383.8000K
C2   13    5     0.5000PF
R3    1   14   380.0000K
R4   14    8    19.9990K
R5   13    9    21.3222K
*
C1CM 14    0     3PF
C2CM 13    0     3PF
CDIF 14   13     7PF
*
.ENDS INA117

* A3_117 OPERATIONAL AMPLIFIER
* CONNECTIONS:   NON-INVERTING INPUT
*                | INVERTING INPUT
*                | | POSITIVE POWER SUPPLY
*                | | | NEGATIVE POWER SUPPLY
*                | | | | OUTPUT
*                | | | | |
.SUBCKT A3_117   1 2 3 4 5
*
C1   11 12 9.283E-12
C2    6  7 13.00E-12
DC    5 53 DX
DE   54  5 DX
DLP  90 91 DX
DLN  92 90 DX
DP    4  3 DX
EGND 99  0 POLY(2) (3,0) (4,0) 0 .5 .5
FB    7 99 POLY(5) VB VC VE VLP VLN 0 4.081E6 -4E6 4E6 4E6 -4E6
GA    6  0 11 12 408.4E-6
GCM   0  6 10 99 408.4E-12
IEE  10  4 DC 39.14E-6
HLIM 90  0 VLIM 1K
Q1   11  2 13 QX
Q2   12  1 14 QX
R2    6  9 100.0E3
RC1   3 11 2.449E3
RC2   3 12 2.449E3
RE1  13 10 1.118E3
RE2  14 10 1.118E3
REE  10 99 5.110E6
RO1   8  5 60
RO2   7 99 60
*  RP    3  4 20.53E3
VB    9  0 DC 0
VC    3 53 DC 4.500
VE   54  4 DC 2
VLIM  7  8 DC 0
VLP  91  0 DC 20
VLN   0 92 DC 20

* OUTPUT SUPPLY MIRROR
FQ3   0 20 POLY(1) VLIM 0  1
DQ1  20 21 DX
DQ2  22 20 DX
VQ1  21  0 0
VQ2  22  0 0
FQ1   3  0 POLY(1) VQ1  1.414E-3  1
FQ2   0  4 POLY(1) VQ2  1.414E-3 -1

* QUIESCIENT CURRENT
RQ    3  4  6.5E5

****************************
.MODEL DX D(IS=800.0E-18)
.MODEL QX NPN(IS=800.0E-18 BF=278.6)
.ENDS
*$